Fundamentals of Embedded Dynamic Memory
By Dr. Esin Terzioglu

Chip design managers face the daunting task of making a choice for each of the IPs on a chip. This paper focuses on the design tradeoffs between choosing 1T dynamic random access memory (eDRAM) and 6T SRAM or MIM-based DRAM.


Optimizing SRAM for Speed, Power, and Density
By Dr. Gil Winograd

The increased demand for smaller portable electronic products with fast performance and extended battery life has fueled the need for memories that simultaneously optimize speed, power and density. This paper details the process to optimize SRAM to meet the design criteria.


Embedded Memory Options for ASICs and SOCs
By Dr. Cyrus Afghahi

This paper discusses various memory options that can be embedded into an ASIC or SOC, as well as reviewing techniques for optimizing speed, cost and density.