coolSRAM-1T™

Novelics coolSRAM-1T embedded memory IP is the industry’s only silicon-proven, single transistor SRAM IP solution that can be implemented in a bulk logic CMOS process without requiring additional masks or manufacturing steps. Use of coolSRAM-1T lowers overall system level cost and power consumption by reducing both the area of standard embedded SRAM and the number of external components.

Based on Novelics’ patented SRAM-1T technology, coolSRAM-1T is an ideal solution for high-density SRAM integration in ASICs, ASSPs, VLSI and System-on-Chip (SoC) applications. Embedded coolSRAM-1T blocks are custom configured by the designer and compiled to meet the design specifications, providing an unprecedented mixof low power and high density to minimize total system cost.

Like all Novelics embedded memory IP, coolSRAM-1T can be customized via the Novelics MemQuest™ memory compiler, a Web-based on-line tool suite that enables the SoC designer to specify and implement custom memories in a matter of minutes.

Novelics coolSRAM-1T Features/Characteristics:

  • Customer architected through the MemQuest memory compiler and characterization tool
  • Circuits based on patented Novelics circuits and 1T cell design
  • Standard, unmodified Logic CMOS process
  • Typically twice the density of standard 6T SRAM
  • Reliable operation and performance well beyond normal Process / Voltage / Temperature variations
  • Higher yield than 6T due to stable circuits, smaller die area and fewer transistors
  • Very low leakage current
  • Offered in leading-edge process nodes at major foundries
Novelics coolSRAM-1T Benefits:
  • Instances can be compiled with complete control of design variables
  • Seamless replacement for existing SRAM-6T
  • No additional mask or process layers required for manufacturing
  • Available as soon as the logic process is ready
  • Ideal for portable applications requiring low system power and high densities
  • Typical 50% increase in available logic or 25% reduction in SoC chip area over 6T
  • Higher density L2 cache for CPUs, DSPs, GPUs and configurable CPUs
  • Suitable for low voltage operation
  • Longer battery life
  • Significant performance, power and system cost advantages in applications such as on chip frame buffers
  • Lower total product cost and time-to-profit