Novelics' coolREG™ products support synchronous single-port, as well as asynchronous two-port and dual-port register files. These dense memories let the designer specify the exact word and bit counts for each specific register file to meet the application�s need. Embedded coolREG blocks include low-power, high-speed, and high-density-configurable register files targeting the most demanding SoC, ASIC and ASSP applications.

Like all Novelics embedded memory IP, coolREG can be customized via the Novelics MemQuest™ memory compiler, a Web-based on-line tool suite that enables the SoC designer to specify and implement custom memories in a matter of minutes.

coolREG Features:

• Based on foundry-provided bit cells
• Reliable, silicon-proven architecture
• Single-port, two-port and dual-port architectures
• The two-port clocked register file provides one read and one write port that share the same memory space. Each port can operate in independent clock domains.
• Writing to the register file is controlled by the clock input and the write-enable input
• The dual-port clocked register file provides two read-and-write ports that share the same memory space. Each port can operate in independent clock domains.
• Best-in-class active power, leakage current, density and speed
• Supports a wide range of clock duty cycles
• Near zero setup time
• Selectable power, speed, and aspect ratio, sub-word writeable
• coolControl� block-by-block leakage power management
• Offered in major foundry leading-edge process nodes

coolREG Benefits:

• Very high performance
• Up to 2x lower active power
• Up to 10x lower leakage current
• Lower end-product cost due to higher achievable densities